1. Field of the Invention
The present invention relates to a press-pack type semiconductor device wherein electrical contact between main electrodes and a semiconductor substrate is effected by their pressure engagement and a method of fabricating the same, and a heat compensator to be used as a part of the press-pack type semiconductor device.
2. Description of the Background Art
Press-pack type semiconductor devices arc constructed such that a semiconductor substrate is sandwiched between external electrodes. FIG. 15 is a vertical section of a power gate turn-off thyristor that is a typical prior art press-pack type semiconductor device. Referring to FIG. 15, the press-pack type semiconductor device 1 comprises a semiconductor substrate 2, first and second disc-like heat compensators 5 and 6 made of molybdenum, an anode copper block 10A, and a cathode copper block 10K. The semiconductor substrate 2 is sandwiched between the copper blocks 10A and 10K, with the heat compensators 5 and 6 fitted therebetween, respectively.
The semiconductor substrate 2 includes a disc-like silicon substrate having at least one pn junction. A brazing material layer 3B made of aluminum (Al) or AlSi is formed on the lower major surface of the semiconductor substrate 2. The semiconductor substrate 2 is brazed to the upper major surface of the heat compensator 5 with the brazing material layer 3B. A gate electrode layer 3G made of Al is formed centrally of the upper major surface of the semiconductor substrate 2, and a cathode electrode layer 3K made of Al is formed on the periphery of the upper major surface thereof. The lower major surface of the heat compensator 6 contacts the surface of the cathode electrode layer 3K under pressure.
Polyimide varnish 2a is applied to the outer peripheral edge of the semiconductor substrate 2 for insulating and protecting an exposed pn junction at the outer peripheral edge. Silicone rubber 4 is further applied to the outer peripheral edge of the semiconductor substrate 2 so as to cover the surface of the polyimide varnish 2a for the purpose of preventing electrical discharges along the edge.
The anode copper block 10A and cathode copper block 10K which are conductive include base portions 11A and 11K, and protruding portions 12A and 12K formed integrally with the base portions 11A and 11K, respectively. Metal flanges 13A and 13K are fixed on the outer periphery of the base portions 11A and 11K, respectively. A cylindrical casing 7 made of ceramic houses the heat compensators 5, 6, and the protruding portions 12A and 12K of the anode and cathode copper blocks 10A and 10K in such a manner as to hold the both surfaces of the semiconductor substrate 2 from vertically opposite sides in the interior of the casing 7. The flange 13A is fixedly brazed to the lower end surface of the casing 7, and the flange 13K is fixedly brazed to the upper end surface of the casing 7.
A through aperture 8 is formed centrally of the heat compensator 6, and a hole 9 is correspondingly formed in the cathode copper block 10K. The through aperture 8 and the hole 9 form a through hole into which a gate electrode support 14 is slidably fitted. A gate electrode 15 is connected to one end of an L-shaped conductor 16. The conductor 16 passes through the lower end portion of the gate electrode support 14 and then through the interior of an insulating tube 17, is drawn out of the casing 7, and is connected by welding to an external gate electrode 18 passing through the casing 7. The gate electrode support 14 is made of an insulating material. A spring 19 is abutted against the upper end of the gate electrode support 14 to urge the gate electrode support 14 downwardly. Consequently, the gate electrode 15 is pressed against the gate electrode layer 3G, to achieve the electrical connection therebetween.
For use in a predetermined equipment, the press-pack type semiconductor device 1 is inserted between anode and cathode members 20A and 20K of the predetermined equipment. External springs not shown urge the anode and cathode members 20A and 20K in the directions of the arrows, respectively, to bring the lower surface of the cathode member 20K into pressure contact with the upper surface of the cathode copper block 10K and to bring the upper surface of the anode member 20A into pressure contact with the lower surface of the anode copper block 10A. This secures the electrical connection between the cathode member 20K and the cathode electrode layer 3K through the cathode copper block 10K and heat compensator 6. The external gate electrode 18 is connected to a gate electrode connecting member (not shown) of the equipment.
In the foregoing state, when a voltage is applied between the anode member 20A and the cathode member 20K, a current flows in the semiconductor device 1 to develop heat from the semiconductor substrate 2. The heat is transferred through the heat compensators 5, 6 and through the anode and cathode copper blocks 10A, 10K to be radiated to the anode and cathode members 20A, 20K. The semiconductor device 1 that is a power semiconductor device carries a large amount of current and, accordingly, generates a large amount of heat. For this reason, when the semiconductor device 1 is used, with the copper blocks 10A and 10K pressed or brazed in direct contact with the semiconductor substrate 2, a thermal stress is generated between the copper blocks 10A, 10K and the semiconductor substrate 2 due to different thermal expansion coefficients therebetween, resulting in damages to the semiconductor substrate 2. The heat compensators 5, 6 having the thermal expansion coefficient relatively close to that of the semiconductor substrate 2 are provided for the purpose of absorbing thermal distortion causing damage to the semiconductor substrate 2.
In the conventional press-pack type semiconductor device 1, the semiconductor substrate 2 is fixed to the heat compensator 5 by brazing. The brazing is carried out at a high temperature of about 700.degree. C. As a result, when the temperature is brought back to room temperature on completing the brazing, the difference in thermal expansion coefficient between the semiconductor substrate 2 and the heat compensator 5 causes warping deformation in the semiconductor substrate 2 and the heat compensator 5.
FIG. 16 schematically shows the deformation. The warping d measures about 100 .mu.m where the thickness of the semiconductor substrate 2 is 1 mm, and the thickness and diameter of the heat compensator 5 are 4 mm and 85 mm, respectively. The warping deformation might cause inadequate electrical contact at the contact surfaces of the semiconductor substrate 2 and the heat compensator 6 and at the contact surfaces of the heat compensator 5 and the anode copper block 10A. The result is excessive heat generated due to the current, presenting the problem of electrical characteristic deterioration such as reduction in current-carrying capacity.
Other problems are that the brazing material such as Al or AlSi locally enters the interior of the semiconductor substrate 2 to produce a spike 2b and that a void 2c which is a cavity is produced in the brazing material layer 3B. The spike 2b decreases the breakdown voltage between the brazing material layer 3b and the cathode electrode layer 3K. The void 2c deteriorates electrical connection between the semiconductor substrate 2 and the heat compensator 5.